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| IN74ACT163 PRESETTABLE COUNTERS High-Speed Silicon-Gate CMOS The IN74ACT163A is identical in pinout to the LS/ALS163 HC/HCT163. The IN74ACT163 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed Cmos Inputs. The IN74ACT163A is programmable 4-bit synchronous counter that feature parallel Load, synchronous Reset, a Carry Output for cascading and count-enable controls. The IN74ACT163A is binary counter with synchronous Reset. TTL/NMOS Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 A ; 0.1 mA @25C Ouptuts Source/Sink 24mA LOGIC DIAGRAM * * * * * ORDERING INFORMATION IN74ACT163N Plastic IN74ACT163D SOIC TA = -40 to 85 C for all packages PIN ASSIGNMENT PIN 16 =VCC PIN 8 = GND FUNCTION TABLE Rese t L H H H H X Load X L H H H X Inputs Enable Enable P T X X X X X L L X H H X X Clock Q0 L P0 Outputs Q1 Q2 L L P1 P2 No change No change Count up No change Q3 L P3 Function Reset to "0" Preset Data No count No count Count No count X=don't care P0,P1,P2,P3 = logic level of Data inputs Ripple Carry Out = Enable T * Q0 * Q1 * Q2 * Q3 1 IN74ACT163 MAXIMUM RATINGS* Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V IIN DC Input Current, per Pin mA 20 IOUT DC Output Sink/Source Current, per Pin mA 50 ICC DC Supply Current, VCC and GND Pins mA 50 PD Power Dissipation in Still Air, Plastic DIP+ 750 mW SOIC Package+ 500 Tstg Storage Temperature -65 to +150 C 260 TL Lead Temperature, 1 mm from Case for 10 C Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC DC Supply Voltage (Referenced to GND) VIN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) TJ Junction Temperature (PDIP) TA Operating Temperature, All Package Types IOH Output Current - High IOL Output Current - Low t r, tf Input Rise and Fall Time * VCC =4.5 V VCC =5.5 V (except Schmitt Inputs) * VIN from 0.8 V to 2.0 V Min 4.5 0 Max 5.5 VCC 140 +85 -24 24 10 8.0 Unit V V C C mA mA ns/V -40 0 0 This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 IN74ACT163 DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) Guaranteed VCC Limits Symbol Parameter Test Conditions V 25 C -40C to 85C VIH Minimum High- VOUT=0.1 V or VCC-0.1 V 4.5 2.0 2.0 Level Input 5.5 2.0 2.0 Voltage VIL Maximum Low - VOUT=0.1 V or VCC-0.1 V 4.5 0.8 0.8 Level Input 5.5 0.8 0.8 Voltage VOH Minimum High- IOUT -50 A 4.5 4.4 4.4 Level Output 5.5 5.4 5.4 Voltage * VIN=VIH or VIL 3.76 3.86 4.5 IOH=-24 mA 4.76 4.86 5.5 IOH=-24 mA VOL Maximum Low- IOUT 50 A 4.5 0.1 0.1 Level Output 5.5 0.1 0.1 Voltage * VIN= VIH or VIL 0.44 0.36 4.5 IOL=24 mA 0.44 0.36 5.5 IOL=24 mA IIN Maximum Input VIN=VCC or GND 5.5 0.1 1.0 Leakage Current 5.5 1.5 Additional Max. VIN=VCC - 2.1 V ICCT ICC/Input VOLD=1.65 V Max IOLD +Minimum 5.5 75 Dynamic Output Current VOHD=3.85 V Min IOHD +Minimum 5.5 -75 Dynamic Output Current VIN=VCC or GND ICC Maximum 5.5 8.0 80 Quiescent Supply Current (per Package) * All outputs loaded; thresholds on input associated with output under test. +Maximum test duration 2.0 ms, one output loaded at a time. Unit V V V V A mA mA mA A 3 IN74ACT163 AC ELECTRICAL CHARACTERISTICS(VCC=5V10% CL=50pF,Input tr=tf=3.0 ns) Guaranteed Limits Symbol Parameter 25 C -40C to 85C Min Max Min Max fmax Maximum Clock Frequency (Figure 1) 120 105 tPLH Propagation Delay Clock to Q (Figure 1.5 10.0 1.5 11.0 1) tPHL Propagation Delay Clock to Q (Figure 1.5 11.0 1.5 12.0 1) tPLH Propagation Delay, Clock to Ripple 2.5 11.5 2.0 13.5 Cary Out (Figure 1) tPHL Propagation Delay, Clock to Ripple 3.0 13.5 2.0 15.0 Cary Out (Figure 1) tPLH Propagation Delay, Enable T to Ripple 2.0 9.0 1.5 10.5 Carry Out (Figure 2) tPHL Propagation Delay, Enable T to Ripple 2.0 10.0 2.0 11.0 Carry Out (Figure 2) CIN Maximum Input Capacitance 4.5 4.5 Typical @25C,VCC=5.0 V 45 Unit MHz ns ns ns ns ns ns pF CPD Power Dissipation Capacitance pF TIMING REQUIREMENTS (VCC=5.0V10%, CL=50pF, Input tr=tf=3.0 ns) Guaranteed Limit Symbol Parameter +25 C -40 C to +85 C tsu Minimum Setup Time, Preset Data Inputs to 10.0 12.0 Clock (Figure 4) th Minimum Hold Time, Clock to Preset Data 0.5 0.5 Inputs (Figure 4) tsu Minimum Setup Time, Reset to Clock (Figure 10.0 11.5 3) th Minimum Hold Time, Clock to Reset (Figure -0.5 -0.5 3) tsu Minimum Setup Time, Load to Clock (Figure 8.5 10.5 5) th Minimum Hold Time, Clock to Load or Preset -0.5 0 Data Inputs (Figure 5) tsu Minimum Setup Time, Enable T or Enable P 5.5 6.5 to Clock (Figure 5) th Minimum Hold Time, Clock to Enable T or 0 0.5 Enable P (Figure 5) tw Minimum Pulse Width, (Load) (Figure 3) 3.5 3.5 tw Minimum Pulse Width, (Count) (Figure 3) 3.5 3.5 Unit ns ns ns ns ns ns ns ns ns ns 4 IN74ACT163 Figure 1. Switching Waveform Figure 2. Switching Waveform Figure 3. Switching Waveform Figure 4. Switching Waveform Figure 5. Switching Waveform 5 IN74ACT163 1. 2. 3. 4. Sequence illustrated in waveforms: Reset outputs to zero. Preset to binary twelve. Count to thirteen, fourteen, fifteen, zero, one, and two. Inhibit. Figure 8. Timing Diagram 6 IN74ACT163 EXPANDED LOGIC DIAGRAM 7 |
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